As background, we will describe both the crystalline silicon (c-Si) PV cell fabrication process and the semiconductor LED fabrication process.
To make a c-Si PV cell, a silicon wafer is subjected to a series of processing steps in a cell fabrication line. Each incoming wafer is lightly bulk-doped (i.e. diffused throughout) with atoms that creates “free carriers” (in semiconductor parlance) of a either positive electrical potential (n-type wafers) or negative electrical potential (p-type wafers). The first step (after incoming inspection to discard defective wafers or to sort the wafers into lots) is to run the wafers through a wet chemical etching process to remove saw marks and other surface defects and contamination. Each wafer is then isotropically textured (another wet process) to microscopically roughen its surface, enhancing its ability to capture incident photons. After texturing, the wafer is then doped with a chemical that creates “free carriers” (in semiconductor parlance), of the opposite electrical potential to the bulk doping, in a layer on the surface(s) of the wafer. In current practice, this doping may occur in one of methods—an “in-line” method or a “batch” method. The in-line method deposits the dopant chemical on the top surface of the wafer, usually carried in a liquid form. (In the case of a phosphorus dopant, this carrier is most commonly phosphoric acid). The deposited dopant carrier is then dried and the resultant product is then diffused (using a high-temperature furnace) into each wafer to form a semiconductor junction that will allow the wafer to produce electricity when exposed to sunlight. In this in-line method the wafers are conveyed continuously through the equipment performing these steps, which typically consist of first a “doper” machine to apply the liquid carrier, then a “dryer” machine to dry the carrier, leaving the dopant chemical on the surface, and a third machine, an in-line diffusion furnace which diffuses the dopant into the wafer. In the batch method, the wafers are loaded into a cassette (most commonly made of quartz and called a “boat” in semiconductor parlance) which is inserted into a “tube” diffusion furnace, which is then sealed, and the wafers are simultaneously exposed to the dopant carrier in gaseous form (most commonly phosphoryl chloride) and heated to diffuse the dopant into the wafers. The wafers are then removed from the furnace, unloaded from the boat and moved to the next part of the fabrication line. In both methods, the amount of dopant introduced, the time spent in the diffusing process and the temperature of the diffusing process determine the penetration depth and concentration by depth of the second dopant. Also, the second dopant is, by nature of the diffusing process introduced and diffused into all of the surfaces of the wafer. Note: from this point onward, “dopant” refers to this second dopant introduced on the surface(s) of the bulk-doped wafer, unless specifically referenced. Each wafer is then wet-etched again to remove phosphosilicate glass (also called PSG, a by-product of the dopant diffusing step) and may be etched to pattern or remove all or a portion of the dopant on the “back” side to prevent shunting. Following this step, a coating (most commonly silicon nitride) is applied to the top surface of the wafer to reduce reflections and passivate the surface. This coating is usually applied using plasma-enhanced chemical vapour deposition equipment. After this, the wafer has metal contacts printed on its top and bottom surfaces, with the top contact pattern designed to minimally interfere with the light exposure to the Si material while providing a path of minimal electrical resistance to the flow of current out of the wafer. These metal contacts (which are printed in the form of a metallic paste) are dried and then diffused into the wafer using a furnace. After this, if the portion of the dopant that is on the back of the wafer has not been previously fully or partially removed, a laser or mechanical device is used to cut a groove around the outside perimeter of the wafer to prevent shunting. Finally, the wafer (which is now a finished PV cell) is tested and graded.
Dopant concentrations, as a function of their distribution within the volume of the wafer, plays a central role in determining the quantum efficiency and other electrical characteristics of the resulting finished PV cell, which ultimately result in its power output capacity and market value. Therefore, the steps within the PV cell fabrication process that are concerned with the quantity and distribution of the dopants that are diffused into the wafer are of paramount importance. Specifically, these steps are: (a) the initial “base” doping of the raw wafer, as supplied by the wafer manufacturer (in most cases at the present time, the raw wafers are positively doped using boron); and (b) the later doping of the outside regions of the wafer (in most cases at the present time this is negative doping using phosphorous). The second doping step forms what is known as the “emitter”. We will use the term “base” to refer to the raw wafer doping, and the term “emitter” to refer to the resulting semiconductor formation produced by the second doping step.
In order to ensure that the emitter formation process is within the required specifications, certain measurements are taken that provide an indication of the raw wafer base dopant concentration and the emitter dopant concentration. In current practice, photovoltaic (PV) wafers are often inspected manually or by single-point visual measurement devices that use visible-spectrum industrial cameras at varying intervals in the PV cell fabrication process. Except for the raw material acceptance stage (at the beginning of the fabrication line) and the final inspection and grading (at the end of the fabrication line), continuous in-line measurement of wafers is often limited in scope and coverage, and off-line non-continuous sampling is used instead, particularly for inspection of properties not amenable to interrogation by visible-spectrum industrial camera technology. When off-line sampling is used, in the time interval between samples, hundreds of wafers can pass through the step or steps of interest in the fabrication process. This situation is common at the process steps that determine the application, concentration and distribution of dopants within the PV wafers, and therefore these steps are not well controlled at present, limiting the yield of acceptable finished goods in PV cell manufacturing plants. To raise yields, the industry is now seeking to implement continuous in-line measurements, ideally on 100 percent of the wafers, in order to better control the steps that affect dopant concentration and distribution in the PV wafers.
In addition to the above-described well-established commercial PV cell structure and fabrication process, certain novel PV cell structures and associated fabrication processes are now being introduced to commercial production. These include selective emitter cells, emitter wrap-through cells and interdigitated back contact solar cells (IBC cells). Selective emitter cells vary the emitter dopant concentration to achieve optimal conduction efficiency in the immediate vicinity of the front-side metal contacts (implying heavier doping in these areas) while limited unwanted carrier recombination between the contacts (implying lighter doping in these areas). Emitter wrap-through and IBC cells eliminate shading losses by putting both the emitter and base contacts on the rear of the cell. The invention described herein may be used for measurement of the dopant content of these PV cell geometries as well as the more common front- and back-contact geometry described above.
A semiconductor Light Emitting Diode (henceforth referred to simply as an “LED”) performs the opposite function to a PV cell. Instead of absorbing photons to generate electricity, an LED uses electricity to emit photons (a phenomenon called electroluminescence). In LED fabrication the wafers are composed of a neutral substrate such as sapphire. As compared to PV cell fabrication, the wafers are polished rather than textured, each wafer contains multiple LEDs, and the dopants used to create the semiconductor are deposited as epitaxial layers on the surface of the wafer, rather than diffused by the diffusion process used in PV cell manufacturing. Notwithstanding these structural and fabrication differences, these dopant layers may be examined by the same method disclosed in this invention. From this point forward, for simplicity and clarity, PV cell structure will be described without limiting the application of the invention to other doped semiconductor structures.
In PV cell fabrication, a number of existing and novel techniques have been proposed for in-line measurement of emitter doping, but all have serious limitations. For measurement of the diffused dopants, they are Surface Photovoltage (SPV) measurement of diffusion length, eddy current measurement of sheet resistance, and an infrared method for measurement of sheet resistance measurement developed at Germany's Fraunhofer Institute for Solar Energy Research. (J. Isenberg, D. Biro and W. Warta, “Fast, Contactless and Spatially Resolved Measurement of Sheet Resistance by an Infrared Method”, Prog. Photovolt: Res. Appl. 2004; 12:539-552). To our knowledge, no method exists for measurement of a wet dopant carrier film.
SPV measurements have been used in the lab for measuring diffusion length (how long an excess carrier in a bulk semiconductor travels, on average, before recombining to achieve equilibrium carrier concentration). See for example: D. K. Schroder, “Surface voltage and surface photovoltage: history, theory and applications”, Meas. Sci. Technol. 12 R16-R31, 2001. SPV measurement is typically performed by placing a wafer on a ground electrode (although a non-contact method without a rear sensor plate is possible) and positioning a capacitive probe a small distance above the sample. Because the measurement is capacitive, the measurement area is very limited, the maximum stand-off distance is extremely small and there is little tolerance for wafer bow or vertical movement. Also, in conveyor-fed manufacturing operations, because of the limited stand-off distance there is a significant opportunity for “crashes” causing a jam on the conveyor if any wafers are stuck together (a not uncommon situation), if a wafer breaks and the pieces are not flat on the conveyor (again not uncommon), or if any foreign objects are inadvertently introduced to the conveyor, or if the conveyor itself experiences a small vertical oscillation exceeding the sensor stand-off distance. Finally, because of the requirement for specialized wafer conveyance, and the very close standoff distance requirement for SPV measurement, introduction of such technology into an existing fabrication line may require significant line modifications that can render its usage costly and impractical.
Eddy current measurement has many of the same limitations as SPV and has previously been shown to be unsuitable for in-line measurement of emitter doping (using sheet resistance measurement as the metric). (Rueland, E.; Fath, P.; Pavelka, T.; Pap, A.; Peter, K.; Mizsei, J, “Comparative study on emitter sheet resistivity measurements for inline quality control”, Photovoltaic Energy Conversion, 2003. Proceedings of 3rd World Conference on Volume 2, Issue, 12-16 May 2003 Page(s): 1085-1087 Vol. 2.)
The Fraunhofer method, while suitable for the laboratory, has many requirements that make it unsuitable for practical in-line use, most notably the stringent requirement for absence of spurious heat or light that is extremely difficult and expensive to provide in an in-line fabrication environment.
In summary, while it is critical that a commercially viable technique be developed to allow in-line measurement of the electrical properties of PV wafers as determined by the dopant content, no known technique currently exists that is configurable enough to be used in various points in a fabrication line, industrially robust enough to operate reliably, and sufficiently cost effective.
There is consequently a need for a method and apparatus that is flexible, configurable, robust and cost-effective for the purpose of in-line measurement of raw wafer dopant concentration, of the amount and distribution of a wet dopant film emerging from an in-line doper, and of the dopant concentration in an emitter at any step in the manufacturing line following diffusion.
There is further a need for defining specific, repeatable sample sites for each wafer in order to be able to map selective emitter, wrap-through contact and IBC cell doping structures as well as traditional uniform doping. As a corollary, there is also a need for an apparatus and method with the ability to vary the scanning “intensity” (the number of samples taken per unit length in the cross-machine direction over a certain time period), in order to allow the operator to perform periodic or unscheduled in-depth measurement, if necessary.